US 12,364,049 B2
Semiconductor device
Yu-Chien Ku, Tainan (TW); Huai-Jen Tung, Tainan (TW); Keng-Ying Liao, Tainan (TW); Yi-Hung Chen, Kaohsiung (TW); Shih-Hsun Hsu, New Taipei (TW); and Yi-Fang Yang, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 3, 2024, as Appl. No. 18/402,734.
Application 18/402,734 is a continuation of application No. 17/525,968, filed on Nov. 15, 2021, granted, now 11,901,390.
Application 17/525,968 is a continuation of application No. 16/403,638, filed on May 6, 2019, granted, now 11,177,308, issued on Nov. 16, 2021.
Application 16/403,638 is a continuation of application No. 15/884,393, filed on Jan. 31, 2018, granted, now 10,283,548, issued on May 7, 2019.
Claims priority of provisional application 62/583,408, filed on Nov. 8, 2017.
Prior Publication US 2024/0136383 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/40 (2006.01); H01L 23/00 (2006.01); H01L 23/52 (2006.01); H10F 39/00 (2025.01); H10F 39/18 (2025.01)
CPC H10F 39/811 (2025.01) [H01L 24/05 (2013.01); H01L 2224/0214 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03831 (2013.01); H01L 2224/05559 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/05578 (2013.01); H10F 39/18 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a single-layered dielectric layer;
a conductive line and a conductive via in the single-layered dielectric layer; and
a conductive pad, wherein the conductive pad is extended into the single-layered dielectric layer to electrically connected to the conductive line.