US 12,364,041 B2
Semiconductor device comprising transistor
Motomu Kurata, Kanagawa (JP); Ryota Hodo, Kanagawa (JP); and Yuta Iida, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP)
Filed on Feb. 3, 2023, as Appl. No. 18/105,407.
Application 16/592,068 is a division of application No. 15/082,633, filed on Mar. 28, 2016, granted, now 10,438,982, issued on Oct. 8, 2019.
Application 18/105,407 is a continuation of application No. 17/315,600, filed on May 10, 2021, granted, now 11,574,944.
Application 17/315,600 is a continuation of application No. 16/592,068, filed on Oct. 3, 2019, granted, now 11,004,882, issued on May 11, 2021.
Claims priority of application No. 2015-069654 (JP), filed on Mar. 30, 2015.
Prior Publication US 2023/0268361 A1, Aug. 24, 2023
Int. Cl. H10D 86/60 (2025.01); H01L 21/768 (2006.01); H10D 30/67 (2025.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01); H10D 87/00 (2025.01); H10D 99/00 (2025.01); H10F 39/00 (2025.01); H01L 23/00 (2006.01); H10B 41/70 (2023.01); H10D 84/08 (2025.01); H10D 84/80 (2025.01)
CPC H10F 39/8053 (2025.01) [H01L 21/76802 (2013.01); H10D 30/673 (2025.01); H10D 30/6734 (2025.01); H10D 30/6739 (2025.01); H10D 86/021 (2025.01); H10D 86/423 (2025.01); H10D 86/451 (2025.01); H10D 86/60 (2025.01); H10D 87/00 (2025.01); H10D 99/00 (2025.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/181 (2013.01); H10B 41/70 (2023.02); H10D 30/6736 (2025.01); H10D 84/08 (2025.01); H10D 84/811 (2025.01); H10F 39/8063 (2025.01)] 8 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a transistor comprising:
a first conductor;
a first insulating film over the first conductor;
an oxide semiconductor layer over the first insulating film;
a source electrode and a drain electrode over the oxide semiconductor layer;
a gate insulating film over the oxide semiconductor layer; and
a gate electrode overlapping with the oxide semiconductor layer,
a first insulator over the oxide semiconductor layer;
a second insulator over the first insulator;
a third insulator over the second insulator;
a fourth insulator over the third insulator;
a second conductor over the fourth insulator, the second conductor reaching the first conductor through a first opening in the first insulating film, the first insulator, the second insulator, and the third insulator; and
a third conductor reaching the gate electrode through a second opening in the second insulator and the third insulator,
wherein the gate insulating film and the gate electrode are provided in an opening in the first insulator,
wherein a level of a topmost surface of the gate electrode is equal to a level of a topmost surface of the first insulator, and
wherein an opening diameter of the first opening in the third insulator is smaller than an opening diameter of the first opening in the second insulator.