US 12,364,022 B2
Integrated circuit
Ya-Qi Ma, Shanghai (CN); Lei Pan, Shanghai (CN); and Zhen Tang, Shanghai (CN)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW); and TSMC CHINA COMPANY LIMITED, Shanghai (CN)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW); and TSMC CHINA COMPANY LIMITED, Shanghai (CN)
Filed on Jun. 29, 2022, as Appl. No. 17/853,703.
Application 17/853,703 is a division of application No. 16/807,003, filed on Mar. 2, 2020, granted, now 11,380,671.
Claims priority of application No. 202010078071.9 (CN), filed on Feb. 2, 2020.
Prior Publication US 2022/0336443 A1, Oct. 20, 2022
Int. Cl. H10D 89/60 (2025.01); H10D 84/40 (2025.01)
CPC H10D 89/811 (2025.01) [H10D 84/40 (2025.01); H10D 89/921 (2025.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a plurality of first active regions of a first conductivity type that are coupled between a pad and a first voltage terminal and configured to discharge electrostatic charges to the first voltage terminal; and
a plurality of second active regions of the first conductivity type that are coupled between the pad and the first voltage terminal and configured to discharge the electrostatic charges,
wherein first regions, which are the closest active regions to the pad in the plurality of first active regions and in the plurality of second active regions, are coupled with each other and have widths greater than widths of remaining active regions in the plurality of first active regions and in the plurality of second active regions,
wherein the plurality of first active regions are included in a first transistor having a breakdown voltage, and
the plurality of second active regions are included in an electrostatic discharge (ESD) primary circuit having a trigger voltage different from the breakdown voltage.