US 12,363,973 B2
SiC wafer and manufacturing method thereof
Keisuke Kobayashi, Tokyo (JP); and Akio Shima, Tokyo (JP)
Assigned to Proterial, Ltd., Tokyo (JP)
Filed by Proterial, Ltd., Tokyo (JP)
Filed on Feb. 24, 2021, as Appl. No. 17/183,549.
Claims priority of application No. 2020-037757 (JP), filed on Mar. 5, 2020.
Prior Publication US 2021/0280677 A1, Sep. 9, 2021
Int. Cl. H01L 21/02 (2006.01); H01L 21/04 (2006.01); H10D 12/01 (2025.01); H10D 30/66 (2025.01); H10D 62/832 (2025.01)
CPC H10D 62/8325 (2025.01) [H01L 21/02378 (2013.01); H01L 21/02447 (2013.01); H01L 21/02529 (2013.01); H01L 21/0262 (2013.01); H01L 21/0445 (2013.01); H10D 12/031 (2025.01); H10D 30/66 (2025.01)] 4 Claims
OG exemplary drawing
 
1. A SiC wafer comprising:
a SiC single crystal substrate;
a buffer layer made of SiC and formed on the SiC single crystal substrate; and
an epitaxial layer formed on the buffer layer and containing SiC,
wherein a composition ratio of C—Si bonds of an upper surface of the epitaxial layer is 50 atm % or less,
wherein the epitaxial layer is single crystal, and
wherein a composition ratio of C—O bonds of the upper surface of the epitaxial layer is 3.6 atm % or more.