| CPC H10D 30/6713 (2025.01) [H01L 21/02521 (2013.01); H01L 21/0259 (2013.01); H01L 21/02609 (2013.01); H01L 21/28518 (2013.01); H10D 30/031 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/118 (2025.01); H10D 62/405 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01)] | 20 Claims |

|
1. A method comprising:
forming a protruding semiconductor stack comprising:
a plurality of sacrificial layers; and
a plurality of nanostructures, wherein the plurality of sacrificial layers and the plurality of nanostructures are laid out alternatingly;
forming a dummy gate structure on the protruding semiconductor stack;
etching the protruding semiconductor stack to form a source/drain recess; and
forming a first source/drain region comprising:
growing first epitaxial layers in the source/drain recess, wherein the first epitaxial layers are grown on sidewalls of the plurality of nanostructures, wherein a cross-section of each of the first epitaxial layers has a quadrilateral shape, and wherein the first epitaxial layers have a first dopant concentration; and
forming a second epitaxial layer on the first epitaxial layers, wherein the second epitaxial layer has a second dopant concentration higher than the first dopant concentration.
|