US 12,363,934 B2
Gate oxide formation for fin field-effect transistor
Bingwu Liu, Meridian, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Apr. 28, 2022, as Appl. No. 17/732,028.
Prior Publication US 2023/0352566 A1, Nov. 2, 2023
Int. Cl. H01L 29/76 (2006.01); H01L 21/768 (2006.01); H01L 29/94 (2006.01); H10B 12/00 (2023.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 30/024 (2025.01) [H01L 21/76843 (2013.01); H10B 12/30 (2023.02); H10D 30/6211 (2025.01); H10D 62/115 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a device having a fin field-effect transistor, the method comprising:
forming a protective liner on an oxide liner with the oxide liner disposed on and contacting sides and top of a fin, the fin disposed extending from a substrate for the fin;
forming gap fill material in gaps about the protective liner, including on the protective liner;
removing a portion of the gap fill material in the gaps, revealing a portion of a combination of the fin with the oxide liner on the fin and the protective liner on the oxide liner;
removing the protective liner from the oxide liner of the revealed portion; portion, and maintaining the oxide liner on and contacting the sides and top of the fin; and
forming a gate for the fin field-effect transistor adjacent the oxide liner, after removing the protective liner from the oxide liner of the revealed portion.