US 12,363,882 B2
Method of manufacturing semiconductor structure and semiconductor structure
Xinman Cao, Hefei (CN); Zhongming Liu, Hefei (CN); Jun Xia, Hefei (CN); and Shijie Bai, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Oct. 13, 2021, as Appl. No. 17/500,276.
Application 17/500,276 is a continuation of application No. PCT/CN2021/097381, filed on May 31, 2021.
Claims priority of application No. 202011217685.7 (CN), filed on Nov. 4, 2020.
Prior Publication US 2022/0139923 A1, May 5, 2022
Int. Cl. H10B 12/00 (2023.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 21/3213 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01)
CPC H10B 12/05 (2023.02) [H01L 21/02071 (2013.01); H01L 21/31055 (2013.01); H01L 21/32138 (2013.01); H01L 21/32139 (2013.01); H01L 21/76224 (2013.01); H01L 21/76895 (2013.01); H10B 12/485 (2023.02); H01L 21/76811 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A method of manufacturing semiconductor structure, comprising:
providing a substrate, the substrate being provided with a plurality of transistor structures arranged at intervals;
forming a conductive layer on the substrate, and removing part of the conductive layer to form a contact structure composed of a plurality of contact pads; wherein each of the contact pads is electrically connected to a transistor structure;
removing residual polymer on the contact pads by wet etching;
forming an insulating protective layer on a surface of each of the contact pads; and
removing, by dry etching, the protective layer on top ends of the contact pads, and residual core on the top ends of the contact pads away from the substrate, wherein at least part of the protective layer on sidewalls of the contact pads is retained.