| CPC H03K 17/56 (2013.01) | 13 Claims |

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1. A semiconductor device generating an output signal at an output terminal, the output signal having a larger voltage amplitude than an input signal, the semiconductor device comprising:
first and second P-type transistors connected in series between a power supply line supplying a first power supply potential and the output terminal; and
first and second N-type transistors connected in series between a reference potential line supplying a reference potential and the output terminal,
wherein the first N-type and P-type transistors have drains electrically connected to the output terminal,
wherein signals for complementarily turning on and off the second N-type and P-type transistors are inputted to gates of the second N-type and P-type transistors according to the input signal, respectively,
wherein the semiconductor device further includes a gate voltage control circuit for changing gate voltages of the first P-type and N-type transistors in accordance with a voltage of the output terminal,
wherein the gate voltage control circuit is configured to cause the first P-type or N-type transistor to follow a change in a voltage of the output terminal while keeping the first P-type or N-type transistor on-states when a voltage of the output signal changes in accordance with a change in a logic level of the input signal, and configured to change a gate voltage of at least one of one of the first N-type and P-type transistors,
wherein the gate voltage control circuit is configured so that when the voltage of the output terminal is higher than a predetermined first bias voltage, the first bias voltage is inputted to the gate of the first P-type transistor and when the voltage of the output terminal is lower than the first bias voltage, a voltage following the voltage of the output terminal is inputted to the gate of the first P-type transistor, and
wherein the first bias voltage is equal to or less than a withstand voltage of each of the first and second P-type transistors and the first and second P-type transistors.
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