US 12,362,272 B2
Semiconductor structure and manufacturing method thereof
Tung-Jiun Wu, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Apr. 19, 2023, as Appl. No. 18/303,557.
Application 17/074,474 is a division of application No. 16/046,657, filed on Jul. 26, 2018, granted, now 10,825,765, issued on Nov. 3, 2020.
Application 18/303,557 is a continuation of application No. 17/074,474, filed on Oct. 19, 2020, granted, now 11,664,306.
Prior Publication US 2023/0253306 A1, Aug. 10, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01); H01L 23/522 (2006.01); H10D 1/68 (2025.01)
CPC H01L 23/5223 (2013.01) [H01L 24/05 (2013.01); H01L 24/13 (2013.01); H10D 1/68 (2025.01); H01L 2224/0401 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05164 (2013.01); H01L 2224/05184 (2013.01); H01L 2224/13026 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19104 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor structure, comprising:
providing a substrate and an intermetal dielectric (IMD) over the substrate;
disposing a metallic layer over the IMD and an insulating layer covering the metallic layer to form a capacitor over the IMD;
disposing a first nitride layer over the capacitor;
disposing an oxide layer on the first nitride layer;
disposing a second nitride layer on the oxide layer; and
forming a conductive via extending from the IMD to the second nitride layer through the metallic layer, the insulating layer, the oxide layer, the first nitride layer and the second nitride layer, and surrounded by the metallic layer, the insulating layer, the oxide layer, the first nitride layer and the second nitride layer.