US 12,361,904 B2
Control switch of driving circuit, array substrate and display panel
Zhenghang He, Mianyang (CN); and Baohong Kang, Mianyang (CN)
Assigned to MIANYANG HKC OPTOELECTRONICS TECHNOLOGY CO., LTD, Mianyang (CN); and HKC CORPORATION LIMITED, Shenzhen (CN)
Appl. No. 17/796,283
Filed by MIANYANG HKC OPTOELECTRONICS TECHNOLOGY CO.,LTD, Mianyang (CN); and HKC CORPORATION LIMITED, Shenzhen (CN)
PCT Filed Dec. 31, 2021, PCT No. PCT/CN2021/143542
§ 371(c)(1), (2) Date Jul. 29, 2022,
PCT Pub. No. WO2022/206078, PCT Pub. Date Oct. 6, 2022.
Claims priority of application No. 202110332223.8 (CN), filed on Mar. 29, 2021.
Prior Publication US 2024/0185810 A1, Jun. 6, 2024
Int. Cl. G02F 1/133 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); G09G 3/36 (2006.01)
CPC G09G 3/36 (2013.01) [G02F 1/13306 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01); G09G 2300/0421 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A control switch of a driving circuit, the control switch comprising a thin film transistor, the driving circuit further comprising at least one source lead connected to the thin film transistor, wherein the thin film transistor comprises:
a source electrode, comprising at least two source branches that are arranged in parallel, and a source trunk connecting the at least two source branches together, wherein each source branch directly connected to the at least one source lead is a first source branch, and wherein the first source branch is connected to an end of the source trunk;
a drain electrode, disposed in a same layer as the source electrode, comprising at least one drain branch and a drain trunk connecting the at least one drain branch together, wherein the at least one drain branch and the at least two source branches are arranged in parallel and alternately to form channels, and wherein each drain branch disposed adjacent to each first source branch is a first drain branch; and
a gate electrode, disposed corresponding to the source electrode and the drain electrode;
wherein an extension line of each of the at least one source lead is located between the respective first drain branch and the source trunk and doesn't overlap the respective first drain branch, wherein the extension line of each of the at least one source lead has a width equal to a width of the respective source lead, and wherein the extension line of each of the at least one source lead is collinear and aligned with the respective source lead;
wherein the thin film transistor is connected to two said source leads, wherein a number of the first source branches is two, and wherein the two first source branches are respectively connected to both ends of the source trunk and are connected to the two source leads in one-to-one correspondence;
wherein each first drain branch is disposed between the two first source branches, and wherein an extension line of each of the two source leads is located between the respective first drain branch and the source trunk and does not overlap the respective first drain branch;
wherein each source branch not directly connected to the at least one source lead is a second source branch, and wherein the second source branch is arranged in parallel between the two first source branches, and is connected to the source trunk;
wherein each drain branch not disposed adjacent to the first source branch is a second drain branch, wherein a number of the first drain branches is two, and the two first drain branches are respectively connected to two ends of the drain trunk, wherein the second drain branch is arranged in parallel between the two first drain branches, and is connected to the drain trunk;
wherein each first drain branch is arranged between the respective first source branch and the respective second source branch that are adjacent to each other, and the second drain branch is arranged between two adjacent second source branches;
wherein a distance between the second drain branch and the source trunk is less than a distance between each first drain branch and the source trunk.