US 12,361,191 B2
Functional circuit block harvesting in computer systems
Peter A. Lisherness, Los Gatos, CA (US); and Lior Zimet, Kerem Maharal (IL)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Sep. 20, 2023, as Appl. No. 18/471,096.
Claims priority of provisional application 63/376,682, filed on Sep. 22, 2022.
Prior Publication US 2024/0103074 A1, Mar. 28, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 30/347 (2020.01); G01R 31/317 (2006.01); G01R 31/319 (2006.01)
CPC G06F 30/347 (2020.01) [G01R 31/31721 (2013.01); G01R 31/31724 (2013.01); G01R 31/31908 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a computer system having a set of processing blocks, wherein the computer system includes:
a set of programmable registers, wherein a given one of the programmable registers corresponds to at least one of the set of processing blocks, wherein the computer system is configured to receive a harvesting command that writes a disable value to a group of one or more of the programmable registers, the group of programmable registers corresponding to a group of the set of processing blocks that are to be disabled for a selected computing platform of a plurality of different computing platforms for which the computer system can be configured;
one or more hardware circuits configured to perform one or more tasks after a given boot of the computer system, wherein the one or more tasks utilize circuitry in at least one of the group of the set of processing blocks; and
a power control circuit configured to, after the one or more tasks have been performed, temporarily disable the group of the set of processing blocks, thereby configuring the computer system for the selected computing platform.