US 12,361,176 B2
Integrity tree for memory security
Andreas Lars Sandberg, Cambridge (GB); and Roberto Avanzi, Grasbrunn (DE)
Assigned to Arm Limited, Cambridge (GB)
Appl. No. 18/003,841
Filed by Arm Limited, Cambridge (GB)
PCT Filed Jun. 25, 2021, PCT No. PCT/GB2021/051620
§ 371(c)(1), (2) Date Dec. 29, 2022,
PCT Pub. No. WO2022/003327, PCT Pub. Date Jan. 6, 2022.
Claims priority of application No. 2010204 (GB), filed on Jul. 3, 2020.
Prior Publication US 2023/0259660 A1, Aug. 17, 2023
Int. Cl. G06F 21/78 (2013.01); G06F 21/64 (2013.01); G06F 21/70 (2013.01); G06F 21/72 (2013.01)
CPC G06F 21/78 (2013.01) [G06F 21/64 (2013.01); G06F 21/72 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An apparatus comprising:
data integrity circuitry to verify integrity of data stored in a memory,
wherein the data integrity circuitry is arranged to maintain a data integrity tree comprising a plurality of nodes, wherein a linked series of nodes of the data integrity tree protects a data item stored in the memory, and wherein, for first and second nodes consecutive in the linked series of nodes, where the first node is nearer to a root node of the data integrity tree and the second node is nearer to a leaf node of the data integrity tree, the first node is parental to the second node,
wherein the plurality of nodes comprises at least one parent node, each parent node comprising:
a plurality of counters, wherein each counter of the plurality of counters is associated with a respective child node to which the parent node is parental and provides an input to a protection function associated with the respective child node; and
a node authentication code protecting the plurality of counters, wherein the node authentication code is generated in dependence on the plurality of counters and on a further counter comprised in a further parent node which is parental to the parent node,
and wherein the plurality of nodes comprises a plurality of hash value child nodes, wherein each hash value child node of the plurality of hash value child nodes comprises a plurality of encrypted hash values generated as a function of a respective block of data stored in the memory and as a function of a counter comprised in a further parent node which is parental to the hash value child node.