US 12,360,927 B2
Duplicated registers in chiplet processing units
Haikun Dong, Beijing (CN); Kostantinos Danny Christidis, Toronto (CA); Ling-Ling Wang, New Taipei (TW); Minhua Wu, Shanghai (CN); Gaojian Cong, Shanghai (CN); and Rui Wang, Shanghai (CN)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US); and ATI Technologies ULC, Markham (CA)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US); and ATI Technologies ULC, Markham (CA)
Filed on Mar. 28, 2024, as Appl. No. 18/620,731.
Application 18/620,731 is a continuation of application No. 17/499,494, filed on Oct. 12, 2021, granted, now 11,947,473.
Prior Publication US 2024/0354268 A1, Oct. 24, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 13/16 (2006.01); G06F 3/06 (2006.01)
CPC G06F 13/1673 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0688 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an interface comprising circuitry configured to communicate with one or more semiconductor dies via a communication link; and
a first control unit comprising circuitry configured to:
receive, via the interface, a register access that targets a register;
perform the register access to a first copy of the register responsive to a determination that a first initiator generated the register access; and
perform the register access to a second copy of the register, different from the first copy, responsive to a determination that a second initiator generated the register access.