US 12,360,871 B2
Peripheral component interconnect board programmable link training and status state machine and state branching
Tarik Rostum, Colorado Springs, CO (US); and Marc Werz, Stuttgart (DE)
Assigned to VIAVI Solutions Inc., Chandler, AZ (US)
Filed by VIAVI Solutions Inc., Chandler, AZ (US)
Filed on Dec. 14, 2023, as Appl. No. 18/539,593.
Claims priority of provisional application 63/387,630, filed on Dec. 15, 2022.
Prior Publication US 2024/0202088 A1, Jun. 20, 2024
Int. Cl. G06F 11/00 (2006.01); G06F 11/27 (2006.01); G06F 13/42 (2006.01)
CPC G06F 11/27 (2013.01) [G06F 13/4221 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
generating, by a device, a link training and status state machine (LTSSM) test configuration that includes states and paths connecting the states;
providing, by the device, the LTSSM test configuration for tracing through by a device under test;
receiving, by the device, results associated with tracing through of the LTSSM test configuration by the device under test;
modifying, by the device and based on the results, one of the paths of the LTSSM test configuration to include a different one of the states and to generate a modified LTSSM test configuration; and
providing, by the device, the modified LTSSM test configuration for tracing through by the device under test.