US 12,360,548 B2
Reference voltage generation within a temperature range
Annabelle Arnold, Zolling (DE); Konrad Wagensohner, Mauern (DE); and Markus Georg Rommel, Freising (DE)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Oct. 28, 2022, as Appl. No. 17/976,516.
Prior Publication US 2024/0143012 A1, May 2, 2024
Int. Cl. G05F 3/26 (2006.01); G05F 3/24 (2006.01); G05F 3/30 (2006.01)
CPC G05F 3/262 (2013.01) [G05F 3/24 (2013.01); G05F 3/26 (2013.01); G05F 3/30 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A circuit, comprising:
a current generator coupled to a first voltage source and configured to:
generate a first current, and
mirror the first current as a second current and a third current;
a proportional to absolute temperature (“PTAT”) voltage generator coupled to the current generator and a second voltage source, the PTAT voltage generator configured to:
receive the second
current from the current generator, and
generate a third voltage based on the second current; and
a complementary to absolute temperature (“CTAT”) voltage generator coupled to the current generator and to the PTAT voltage generator, the CTAT voltage generator configured to:
receive the first current and the third current from the current generator, and
generate a reference voltage based on the first current, the second current, and the third voltage,
wherein:
the current generator includes a first field effect transistor (FET), a second FET, and a third FET, the first FET having a first gate, a first source, and a first drain, the second FET having a second gate, a second source and a second drain, and the third FET having a third gate, a third source, and a third drain;
the first FET configured to generate the first current;
the second FET and the third FET configured to mirror the first current as the second current and the third current, respectively;
the first source, the second source, and the third source coupled together and to the first voltage source;
the first gate, the second gate, and the third gate connected to one another and the first drain;
the second drain is connected to a FET in the PTAT voltage generator; and
the first drain and the third drain are connected to a transistor in the CTAT voltage generator.