CPC H10N 60/805 (2023.02) [G01R 33/34023 (2013.01); G11C 11/44 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); H01L 23/544 (2013.01); H03H 11/02 (2013.01); H04L 63/0876 (2013.01); H10N 60/0912 (2023.02); H10N 60/12 (2023.02); H10N 60/815 (2023.02); H10N 60/82 (2023.02); H10N 69/00 (2023.02); B82Y 10/00 (2013.01); G06N 10/00 (2019.01); H01L 2223/54446 (2013.01)] | 5 Claims |
1. A method of causing identification of a superconducting chip comprising:
causing the superconducting chip to provide resonant frequencies based on one or more short circuits as a shorted tunnel barrier that have been programmed within a resonant array of Josephson junctions in the superconducting chip as fabricated; and
determining, by a computer system, an authenticity of the superconducting chip as fabricated based on the one or more short circuits causing the resonant frequencies to be in two different frequency bands having first resonant frequencies and second resonant frequencies, the authenticity of the superconducting chip being based on one or more short circuits on the superconducting chip, wherein:
the computer system determines the authenticity of the resonant frequencies based on the two different frequency bands comprising a first frequency band and a second frequency band;
a first representation correlates to each of the first resonant frequencies; and
a second representation correlates to an expected location for each of the second resonant frequencies, a combination of the first and second representations being used to identify the superconducting chip.
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