US 12,035,061 B2
Imaging device and electronic device
Shunpei Yamazaki, Tokyo (JP); and Takayuki Ikeda, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP)
Appl. No. 17/422,580
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
PCT Filed Jan. 22, 2020, PCT No. PCT/IB2020/050457
§ 371(c)(1), (2) Date Jul. 13, 2021,
PCT Pub. No. WO2020/157600, PCT Pub. Date Aug. 6, 2020.
Claims priority of application No. 2019-013507 (JP), filed on Jan. 29, 2019.
Prior Publication US 2022/0103772 A1, Mar. 31, 2022
Int. Cl. H04N 25/75 (2023.01); H01L 27/146 (2006.01); H04N 25/79 (2023.01)
CPC H04N 25/75 (2023.01) [H01L 27/14612 (2013.01); H01L 27/14636 (2013.01); H04N 25/79 (2023.01)] 10 Claims
OG exemplary drawing
 
1. An imaging device comprising a first layer, a second layer, and a third layer,
wherein the second layer is provided between the first layer and the third layer,
wherein the first layer comprises a photoelectric conversion device,
wherein the second layer comprises a first circuit and a second circuit,
wherein the third layer comprises a third circuit and a fourth circuit,
wherein the first circuit and the photoelectric conversion device are configured to generate imaging data,
wherein the third circuit is configured to read the imaging data,
wherein the second circuit is configured to store the imaging data read by the third circuit,
wherein the fourth circuit is configured to read the imaging data stored in the second circuit,
wherein the second circuit comprises a first transistor and a first capacitor,
wherein one of a source and a drain of the first transistor is electrically connected to one electrode of the first capacitor,
wherein the other of the source and the drain of the first transistor is electrically connected to the third circuit,
wherein the other of the source and the drain of the first transistor is electrically connected to the fourth circuit, and
wherein the first transistor comprises a metal oxide in a channel formation region.