CPC H04N 19/12 (2014.11) [H04N 19/129 (2014.11); H04N 19/167 (2014.11); H04N 19/176 (2014.11); H04N 19/18 (2014.11)] | 16 Claims |
1. A decoding apparatus for decoding a transformed representation of a block from a data stream, wherein the decoding apparatus comprises:
a processor; and
a memory storing instructions that, when executed by the processor, cause the processor to:
decode coefficient position information from the data stream, wherein the coefficient position information is indicative of a first coded coefficient position within a transform coefficient block;
determine, using the first coded coefficient position, that at least one non-zero coefficient is located outside a predetermined subarea of the transform coefficient block;
based on the determining, reduce a set of available transforms to a first set of one or more available transforms by removing from the set of available transforms a second set of one or more available transforms;
determine a transform underlying the transform coefficient block out of the first set of one or more available transforms; and
decode values of transform coefficients of the transform coefficient block that are, along a first coefficient scan order, located from the first coded coefficient position onward to a last scanned position using the determined transform.
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