US 12,034,450 B2
Apparatus for correcting a mismatch, digital-to-analog converter system, transmitter, base station, mobile device and method for correcting a mismatch
Daniel Gruber, St. Andrae (AT); Ramon Sanchez, Galapagar (ES); Kameran Azadet, San Ramon, CA (US); and Martin Clara, Santa Clara, CA (US)
Assigned to Intel Corporation, SantaClara (CA)
Appl. No. 17/754,308
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Dec. 27, 2019, PCT No. PCT/US2019/068645
§ 371(c)(1), (2) Date Mar. 30, 2022,
PCT Pub. No. WO2021/133401, PCT Pub. Date Jul. 1, 2021.
Prior Publication US 2022/0345143 A1, Oct. 27, 2022
Int. Cl. H03M 1/10 (2006.01); H03M 1/06 (2006.01)
CPC H03M 1/1033 (2013.01) [H03M 1/0626 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An apparatus for correcting a mismatch between a first segment and a second segment of a Digital-to-Analog Converter, DAC, wherein the first segment generates a first contribution to an analog output signal of the DAC based on a first number of bits of a digital input word for the DAC, and wherein the second segment generates a second contribution to the analog output signal based on a second number of bits of the digital input word, the apparatus comprising:
an input configured to receive the digital input word;
a first processing circuit for the first number of bits comprising a first filter configured to modify the first number of bits in order to generate first modified bits;
a second processing circuit for the second number of bits comprising a second filter configured to modify the second number of bits in order to generate second modified bits; and
an output configured to output a modified digital input word for the DAC, wherein the modified digital input word is based on the first modified bits and the second modified bits.