US 12,034,404 B2
Method of fabricating a superconducting parallel plate capacitor
Andrew J. Berkley, Vancouver (CA); Loren J. Swenson, Burnaby (CA); Mark H. Volkmann, North Vancouver (CA); Jed D. Whittaker, Vancouver (CA); Paul I. Bunyk, New Westminster (CA); Peter D. Spear, Burnaby (CA); and Christopher B. Rich, Vancouver (CA)
Assigned to 1372934 B.C. LTD., Burnaby (CA)
Filed by D-WAVE SYSTEMS INC., Burnaby (CA)
Filed on Jan. 26, 2021, as Appl. No. 17/158,484.
Application 17/158,484 is a division of application No. 15/572,731, granted, now 10,938,346, previously published as PCT/US2016/031885, filed on May 11, 2016.
Claims priority of provisional application 62/288,251, filed on Jan. 28, 2016.
Claims priority of provisional application 62/161,780, filed on May 14, 2015.
Prior Publication US 2021/0218367 A1, Jul. 15, 2021
Int. Cl. H03B 15/00 (2006.01); G06N 10/20 (2022.01); G06N 10/40 (2022.01); H01P 7/08 (2006.01); H01P 7/10 (2006.01); H03H 7/01 (2006.01); H10N 60/12 (2023.01); G06N 10/00 (2022.01)
CPC H03B 15/003 (2013.01) [G06N 10/20 (2022.01); G06N 10/40 (2022.01); H01P 7/08 (2013.01); H01P 7/105 (2013.01); H03H 7/01 (2013.01); H10N 60/12 (2023.02); G06N 10/00 (2019.01); H03B 2201/02 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A method of fabricating a superconducting parallel plate capacitor, the method comprising:
depositing a first superconductive layer, the first superconductive layer comprising a material that is superconductive in a range of critical temperatures;
depositing a first dielectric layer to overlie at least part of the first superconductive layer;
depositing a second superconductive layer to overlie at least part of the dielectric layer, the second superconductive layer comprising a material that is superconductive in the range of critical temperatures;
removing a portion of the second superconductive layer to form at least one structure from the second superconductive layer and to expose at least part of the first dielectric layer;
depositing a second dielectric layer to overlie at least part of the second superconductive layer and at least part of the first dielectric layer;
planarizing the second dielectric layer;
removing at least part of the second dielectric layer to form a first via exposing at least part of the second superconductive layer;
removing at least part of the second dielectric layer and at least part of the first dielectric layer to form a second via exposing at least part of the first superconductive layer;
depositing a first region of a third superconductive layer; and
depositing a second region of the third superconductive layer, wherein the first region of the third superconductive layer is electrically isolated from the second region of the third superconductive layer, the first region of the third superconductive layer is superconductingly connected to at least part of the second superconductive layer by way of the first via, and the second region of the third superconductive layer is superconductingly connected to at least part of the first superconductive layer by way of the second via.