US 12,034,380 B2
Inverter circuit based on a heric topology, inverter, and photovoltaic power system
Dechen Wang, Xi'an (CN); Peng Shi, Xi'an (CN); and Zheng Ma, Xi'an (CN)
Assigned to Huawei Digital Power Technologies Co., Ltd., Shenzhen (CN)
Filed by Huawei Digital Power Technologies Co., Ltd., Shenzhen (CN)
Filed on Nov. 29, 2021, as Appl. No. 17/536,624.
Application 17/536,624 is a continuation of application No. PCT/CN2020/091982, filed on May 25, 2020.
Claims priority of application No. 201910469584.X (CN), filed on May 31, 2019.
Prior Publication US 2022/0085756 A1, Mar. 17, 2022
Int. Cl. H02M 7/5387 (2007.01)
CPC H02M 7/5387 (2013.01) 19 Claims
OG exemplary drawing
 
1. An inverter circuit, comprising:
a bus, a first longitudinal bridge, a second longitudinal bridge, a transverse bridge, and a filter, wherein a capacitor group is disposed on the bus, the bus is connected in parallel to a direct current power supply, and the capacitor group comprises a first capacitor and a second capacitor that are disposed in series;
the bus is connected in parallel to the first longitudinal bridge, the first longitudinal bridge is connected in parallel to the second longitudinal bridge, the first longitudinal bridge comprises a first switching transistor and a second switching transistor that are connected in series, the second longitudinal bridge comprises a third switching transistor and a fourth switching transistor that are connected in series, and two ends of the transverse bridge are respectively connected to the first longitudinal bridge and the second longitudinal bridge;
the filter is connected in parallel to the transverse bridge, the filter is configured to be connected to an alternating current power grid, and the transverse bridge is configured to supply power to the alternating current power grid by using the filter; and
the inverter circuit further comprises
a third capacitor having a first end connected to a source of the first switching transistor and having a second end connected to a drain of the first switching transistor through the first capacitor and
a fourth capacitor having a first end connected to a drain of the fourth switching transistor and having a second end connected to a source of the fourth switching transistor through the second capacitor.