CPC H02M 3/1584 (2013.01) [G06F 13/4282 (2013.01); H02M 3/157 (2013.01); G06F 2213/0016 (2013.01); G06F 2213/0038 (2013.01)] | 20 Claims |
1. An electronic device comprising:
a system-on chip (SoC) including a plurality of power domains and a dynamic voltage and frequency scaling (DVFS) controller configured to perform DVFS on the plurality of power domains, each of the plurality of power domains including at least one function block; and
a power management integrated circuit (PMIC) including a plurality of direct current (DC)-DC converters and a control logic configured to control the plurality of DC-DC converters, each of the plurality of DC-DC converters configured to provide a corresponding one of a plurality of output voltages to a respective one of the plurality of power domains,
wherein the control logic is configured to:
designate a target DC-DC converter configured to provide a target output voltage having a target level, from among the plurality of DC-DC converters, as a global DC-DC converter based on a power management control signal associated with the DVFS; and
provide the target output voltage to a power domain corresponding to the global DC-DC converter and to at least one first power domain consuming the target output voltage, from among the plurality of power domains, by sharing the target output voltage provided by the global DC-DC converter.
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