US 12,034,322 B2
Semiconductor device and operating method of semiconductor device
Yuki Okamoto, Isehara (JP); Takahiko Ishizu, Sagamihara (JP); Kei Takahashi, Isehara (JP); and Takayuki Ikeda, Atsugi (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Appl. No. 17/422,314
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
PCT Filed Jan. 14, 2020, PCT No. PCT/IB2020/050244
§ 371(c)(1), (2) Date Jul. 12, 2021,
PCT Pub. No. WO2020/152541, PCT Pub. Date Jul. 30, 2020.
Claims priority of application No. 2019-010581 (JP), filed on Jan. 24, 2019; application No. 2019-012339 (JP), filed on Jan. 28, 2019; application No. 2019-019478 (JP), filed on Feb. 6, 2019; application No. 2019-219308 (JP), filed on Dec. 4, 2019; and application No. 2019-221555 (JP), filed on Dec. 6, 2019.
Prior Publication US 2022/0094177 A1, Mar. 24, 2022
Int. Cl. H02J 7/00 (2006.01); H01M 10/48 (2006.01)
CPC H02J 7/0019 (2013.01) [H01M 10/48 (2013.01); H02J 7/0016 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first comparator circuit configured to output a first signal controlling charging of a secondary battery;
a second comparator circuit configured to output a second signal controlling charging of the secondary battery;
a third comparator circuit configured to output a third signal controlling discharging of the secondary battery;
a first transistor of which one of a source electrode and a drain electrode is electrically connected to an inverting input terminal of the first comparator circuit;
a first capacitor of which one electrode is electrically connected to the one of the source electrode and the drain electrode of the first transistor;
a second transistor of which one of a source electrode and a drain electrode is electrically connected to an inverting input terminal of the second comparator circuit;
a second capacitor of which one electrode is electrically connected to the one of the source electrode and the drain electrode of the second transistor;
a third transistor of which one of a source electrode and a drain electrode is electrically connected to a non-inverting input terminal of the third comparator circuit;
a third capacitor of which one electrode is electrically connected to the one of the source electrode and the drain electrode of the third transistor; and
a selector circuit of which an output terminal is electrically connected to the other electrode of the first capacitor, the other electrode of the second capacitor, and the other electrode of the third capacitor,
wherein the other of the source electrode and the drain electrode of the first transistor, the other of the source electrode and the drain electrode of the second transistor, and the other of the source electrode and the drain electrode of the third transistor are electrically connected to one another, and
wherein a first input terminal of the selector circuit is electrically connected to a negative electrode terminal for the secondary battery.