US 12,034,061 B2
Method for forming semiconductor structure
Chien-Wei Lee, Kaohsiung (TW); Yen-Ru Lee, Hsinchu (TW); Hsueh-Chang Sung, Zhubei (TW); and Yee-Chia Yeo, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Mar. 7, 2022, as Appl. No. 17/688,236.
Application 17/688,236 is a continuation of application No. 16/837,465, filed on Apr. 1, 2020, granted, now 11,271,096.
Prior Publication US 2022/0190139 A1, Jun. 16, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/6681 (2013.01) [H01L 21/02054 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/7848 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
forming a gate structure over a substrate;
forming a spacer on a sidewall of the gate structure;
forming a source/drain recess beside the spacer;
treating the source/drain recess and partially removing the spacer in a first cleaning process, wherein the first cleaning process removes metal residue;
treating the source/drain recess with a plasma process after performing the first cleaning process;
treating the source/drain recess in a second cleaning process after treating the source/drain recess with the plasma process, wherein the first cleaning process and the second cleaning process use different etchants; and
forming a source/drain structure in the source/drain recess after performing the second cleaning process.