US 12,034,046 B2
Thyristor semiconductor device and corresponding manufacturing method
Nicolas Guitard, Allevard (FR)
Assigned to STMicroelectronics (Crolles 2) SAS, Crolles (FR)
Filed by STMicroelectronics (Crolles 2) SAS, Crolles (FR)
Filed on Jun. 28, 2022, as Appl. No. 17/851,872.
Application 17/851,872 is a division of application No. 16/788,091, filed on Feb. 11, 2020, granted, now 11,398,549.
Claims priority of application No. 1901379 (FR), filed on Feb. 12, 2019.
Prior Publication US 2022/0328629 A1, Oct. 13, 2022
Int. Cl. H01L 29/08 (2006.01); H01L 27/02 (2006.01); H01L 27/102 (2023.01); H01L 29/167 (2006.01); H01L 29/66 (2006.01); H01L 29/74 (2006.01)
CPC H01L 29/083 (2013.01) [H01L 27/0248 (2013.01); H01L 27/1027 (2013.01); H01L 29/167 (2013.01); H01L 29/66363 (2013.01); H01L 29/74 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure, comprising:
a substrate;
a first layer embedded in the substrate, the first layer having a first type of conductivity;
a second layer embedded in the first layer, the second layer having a second type of conductivity opposite to the first type of conductivity, the second layer being separated from the substrate by the first layer;
a first dielectric structure partially embedded within the first layer and laterally positioned between the first layer and the second layer;
a third layer stacked over the second layer, the third layer having the first type of conductivity; and
a fourth layer stacked over the third layer, the fourth layer having the second type of conductivity.