CPC H01L 29/0653 (2013.01) [H01L 27/0886 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/42392 (2013.01); H01L 29/7851 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] | 12 Claims |
1. A method of manufacturing a semiconductor device, the method comprising:
forming a first trench and a second trench with active patterns therebetween on a substrate;
forming a first insulating layer on the first trench and the second trench;
forming a liner layer on the first insulating layer;
forming a second insulating layer on the liner layer; and
recessing the second insulating layer to form a first device isolation layer in the first trench and a second device isolation layer in the second trench,
wherein a width of the second trench in a first direction is greater than a width of the first trench in the first direction, and
wherein the second device isolation layer includes a first protrusion and a second protrusion which are formed by remaining portions of the liner layer.
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