CPC H01L 27/0207 (2013.01) [H01L 23/5226 (2013.01); H01L 23/5286 (2013.01)] | 7 Claims |
1. A standard cell block comprising:
a plurality of standard cells disposed in a matrix form and comprising a first standard cell and a second standard cell arranged in a first direction, the first and second standard cell having different cell heights along a second direction that is different from the first direction,
wherein each of the first and second standard cells comprises:
a first active region disposed in a first metal-oxide-semiconductor (MOS) region and extending in a first direction; and
a second active region disposed in a second MOS region and extending in the first direction,
wherein the standard cell block further comprises:
a first power rail extending in the first direction across the first MOS regions of the first standard cell and of the second standard cell, and
a second power rail extending in the first direction across the second MOS regions of the first standard cell and of the second standard cell,
wherein the first power rail is disposed closer to a boundary between the first MOS region and the second MOS region than to a first side of the first MOS region in each of the first standard cell and the second standard cell,
wherein the second power rail is disposed closer to the boundary between the first MOS region and the second MOS region than to a first side of the second MOS region in each of the first and second standard cells, and
wherein each of the first power rail and the second power rail has a uniform width in a second direction perpendicular to the first direction.
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