| CPC H01L 23/544 (2013.01) [H01L 25/0657 (2013.01); H01L 2223/54486 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01)] | 13 Claims |
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1. A semiconductor package comprising:
a first die disposed on a package substrate;
a second die stacked on the first die;
a third die stacked on the second die; and
first, second, and third position checkers disposed on the package substrate,
wherein in order to indicate a first position allowable range in which a first side of the first die can be located, the first position checker comprises:
a first reference pattern indicating a first reference position where the first side of the first die is to be located; and
a first limit pattern spaced apart from the first reference pattern by the first position allowable range, and
wherein in order to indicate a second position allowable range in which a second side of the second die can be located, the second position checker comprises:
a second reference pattern indicating a second reference position where the second side of the second die is to be located; and
a second upper limit pattern and a second lower limit pattern that are spaced apart from each other with the second reference pattern therebetween.
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