US 12,033,904 B2
Semiconductor package system and related methods
Yushuang Yao, Seremban (MY); Chee Hiong Chew, Seremban (MY); and Atapol Prajuckamol, Klaeng (TH)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Nov. 2, 2020, as Appl. No. 17/086,932.
Application 17/086,932 is a continuation of application No. 15/341,367, filed on Nov. 2, 2016, granted, now 10,825,748.
Application 15/341,367 is a continuation in part of application No. 15/136,605, filed on Apr. 22, 2016, granted, now 11,342,237.
Claims priority of provisional application 62/267,349, filed on Dec. 15, 2015.
Prior Publication US 2021/0050272 A1, Feb. 18, 2021
Int. Cl. H01L 23/48 (2006.01); H01L 23/053 (2006.01); H01L 23/08 (2006.01); H01L 23/18 (2006.01); H01L 23/498 (2006.01)
CPC H01L 23/053 (2013.01) [H01L 23/08 (2013.01); H01L 23/18 (2013.01); H01L 23/49811 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a substrate;
a case coupled to the substrate;
a cover coupled within an opening of the case; and
a plurality of press-fit pins;
wherein the plurality of press-fit pins is fixedly coupled with the case;
wherein the plurality of press-fit pins comprises at least one locking portion that extends from a side of the plurality of press-fit pins and is molded into only one of the case or the cover; and
wherein the plurality of press-fit pins is electrically and directly mechanically coupled to the substrate.