US 12,033,803 B2
Multilayer capacitor
Man Su Byun, Suwon-si (KR); Se Hun Park, Suwon-si (KR); Soo Hwan Son, Suwon-si (KR); and Taek Jung Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-si (KR)
Filed on Mar. 29, 2022, as Appl. No. 17/706,785.
Claims priority of application No. 10-2021-0194080 (KR), filed on Dec. 31, 2021.
Prior Publication US 2023/0215648 A1, Jul. 6, 2023
Int. Cl. H01G 4/30 (2006.01); H01G 2/06 (2006.01); H01G 4/012 (2006.01); H01G 4/12 (2006.01); H05K 1/11 (2006.01)
CPC H01G 4/30 (2013.01) [H01G 2/065 (2013.01); H01G 4/012 (2013.01); H01G 4/1218 (2013.01); H05K 1/111 (2013.01); H05K 2201/10015 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A multilayer capacitor comprising:
a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked on each other having at least one dielectric layer interposed therebetween in a first direction;
first and second external electrodes disposed on the body while being spaced apart from each other to be respectively connected to the at least one first internal electrode and the at least one second internal electrode; and
first and second bumps respectively having one surface disposed on the first or second external electrode and including at least one hole positioned in the one surface or the other surface,
wherein:
a depth of the at least one hole is same as or smaller than a thickness of the first bump or the second bump,
the first and second bumps include a metal material,
AV indicates a total area of the at least one hole,
AB indicates an area of the one surface of the first or second bump, facing the first or second external electrode, and
AV/AB is greater than 0.012 and less than 0.189.