CPC G11C 16/3459 (2013.01) [G11C 16/08 (2013.01); G11C 16/102 (2013.01); G11C 16/16 (2013.01)] | 20 Claims |
1. A method of operating one or more nonvolatile memory devices, each nonvolatile memory device including one or more memory blocks, each memory block including a plurality of memory cells and a plurality of pages that are connected to a plurality of wordlines and arranged in a vertical direction, the method comprising:
setting pages arranged in a first direction of a channel hole as a first page to an N-th page, N being a natural number greater than or equal to two, the channel hole extending in the vertical direction, a size of the channel hole increasing in the first direction;
setting pages arranged in a second direction of the channel hole as an (N+1)-th page to a 2N-th page, the size of the channel hole decreasing in the second direction;
setting a first page pair to an N-th page pair such that a K-th page, among the first to the N-th pages, and an (N+K)-th page, among the (N+1)-th to the 2N-th pages, form one page pair, K being a natural number greater than or equal to one and less than or equal to N; and
driving the first to the N-th page pairs such that parity regions of two pages included in at least one page pair of the first to the N-th page pairs are shared by the two pages included in the at least one page pair.
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