US 12,033,686 B2
Memory device adjusting duty cycle and memory system having the same
Dae-Sik Moon, Suwon-si (KR); Gil-Hoon Cha, Hwaseong-si (KR); Ki-Seok Oh, Seoul (KR); Chang-Kyo Lee, Seoul (KR); Yeon-Kyu Choi, Seoul (KR); Jung-Hwan Choi, Hwaseong-si (KR); Kyung-Soo Ha, Hwaseong-si (KR); and Seok-Hun Hyun, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on May 9, 2023, as Appl. No. 18/314,243.
Application 18/314,243 is a continuation of application No. 17/816,138, filed on Jul. 29, 2022, granted, now 11,749,338.
Application 17/816,138 is a continuation of application No. 17/807,163, filed on Jun. 16, 2022, granted, now 11,749,337.
Application 17/807,163 is a continuation of application No. 17/564,564, filed on Dec. 29, 2021, granted, now 11,423,971, issued on Aug. 23, 2022.
Application 17/564,564 is a continuation of application No. 17/148,915, filed on Jan. 14, 2021, granted, now 11,393,522, issued on Jul. 19, 2022.
Application 17/148,915 is a continuation of application No. 16/230,185, filed on Dec. 21, 2018, granted, now 10,923,175, issued on Feb. 16, 2021.
Claims priority of application No. 10-2018-0012423 (KR), filed on Jan. 31, 2018; and application No. 10-2018-0062094 (KR), filed on May 30, 2018.
Prior Publication US 2023/0274776 A1, Aug. 31, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/4076 (2006.01); G06F 3/06 (2006.01); G11C 7/22 (2006.01); G11C 11/409 (2006.01)
CPC G11C 11/4076 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0653 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 7/222 (2013.01); G11C 11/409 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a first duty cycle adjustor configured to perform a first duty adjust operation to adjust a first clock based on first monitoring information;
a second duty cycle adjustor configured to perform a second duty adjust operation to adjust a second clock based on second monitoring information;
a duty cycle monitor coupled to the first duty cycle adjustor and the second duty cycle adjustor, configured to monitor the first clock and the second clock, configured to generate the first monitoring information based on a result of monitoring the first clock, and configured to generate the second monitoring information based on a result of monitoring the second clock; and
a controller configured to determine a duty state of the first clock and a duty state of the second clock, wherein the first duty adjust operation and the second duty adjust operation are performed in response to an enable signal.