US 12,033,683 B2
Methods and circuits for power management of a memory module
Panduka Wijetunga, Thousand Oaks, CA (US); Aws Shallal, Cary, NC (US); and Joey M. Esteves, Tracy, CA (US)
Assigned to Rambus Inc., San Jose, CA (US)
Filed by Rambus Inc., San Jose, CA (US)
Filed on Apr. 20, 2022, as Appl. No. 17/725,026.
Claims priority of provisional application 63/185,906, filed on May 7, 2021.
Prior Publication US 2022/0358989 A1, Nov. 10, 2022
Int. Cl. G11C 11/40 (2006.01); G11C 11/4074 (2006.01)
CPC G11C 11/4074 (2013.01) 20 Claims
OG exemplary drawing
 
1. A power-management integrated circuit (PMIC) comprising:
a first external input node to receive a first supply voltage;
a second external input node to receive a second supply voltage lower than the first supply voltage;
an internal supply node to deliver an internal supply voltage lower than the first supply voltage;
an internal power supply coupled to the first and second external input nodes and the internal supply node, the internal power supply to derive the internal supply voltage from the first supply voltage in a first power mode and from the second supply voltage in a second power mode;
a voltage converter coupled to the first external input node and the internal supply node, the voltage converter to produce an external supply voltage from the first supply voltage and the internal supply voltage; and
an external output node coupled to the voltage converter to deliver the external supply voltage from the PMIC.