US 12,032,850 B2
Memory controller performing booting operation and method of operating the same
Ji Hun Choi, Icheon (KR); Jeong Hyun Kim, Icheon (KR); and Sung Ju Yoo, Icheon (KR)
Assigned to SK hynix Inc., Icheon (KR)
Filed by SK hynix Inc., Icheon (KR)
Filed on May 24, 2022, as Appl. No. 17/752,754.
Claims priority of application No. 10-2021-0175060 (KR), filed on Dec. 8, 2021.
Prior Publication US 2023/0176772 A1, Jun. 8, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/061 (2013.01); G06F 3/0679 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory controller for controlling a plurality of memory devices, each including a plurality of memory blocks, the memory controller comprising:
a buffer configured to store workload information including a history of an expected input/output request that is expected to be received from a host during a booting operation;
a prefetch controller configured to, before a target input/output request is received from the host after the booting operation starts, read expected data corresponding to the expected input/output request from the plurality of memory devices based on the workload information including a result of a comparison between an expected reception time of the expected input/output request and a time elapsed since starting of the booting operation, and store the expected data in the buffer; and
a boot controller configured to update the workload information based on the target input/output request according to whether target data corresponding to the target input/output request is included in the expected data, and to store updated workload information in an area in which is readable with a minimum number of accesses from the plurality of the memory devices.