US 12,032,837 B2
Non-volatile memory with reduced word line switch area
Yuki Mizutani, San Jose, CA (US); Kazutaka Yoshizawa, Kuwana (JP); Kiyokazu Shishido, Yokkaichi (JP); and Eiichi Fujikura, Yokkaichi (JP)
Assigned to SanDisk Technologies LLC, Austin, TX (US)
Filed by SanDisk Technologies LLC, Addison, TX (US)
Filed on Sep. 30, 2022, as Appl. No. 17/957,424.
Prior Publication US 2024/0111440 A1, Apr. 4, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0626 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-volatile storage apparatus, comprising:
a control circuit configured to connect to a non-volatile memory structure that includes word lines connected to non-volatile memory cells arranged in blocks, the control circuit configured to perform one or more memory operations on the non-volatile memory structure, the control circuit comprising:
one or more voltage sources; and
word line switches configured to connect the voltage sources to the word lines, the word line switches arranged in groups of X word line switches, each group of X word line switches including one or more word line switches each comprising:
an active region;
a first transistor on the active region including a first source terminal connectable to the one or more voltage sources, a first drain terminal configured to connect to a word line of a first block of the non-volatile memory cells, and a first control gate over the active region between the first source terminal and the first drain terminal;
a second transistor on the active region including a second source terminal connectable to the one or more voltage sources, a second drain terminal configured to connect to a word line of a second block of the non-volatile memory cells, and a second control gate over the active region between the second source terminal and the second drain terminal, the second block being a different block of the non-volatile memory cells than the first block and the first drain terminal and the second drain terminal being adjacent terminal on the active region; and
an intermediate control gate over the active region between the first drain terminal and the second drain terminal and configured to always be in an off state.