CPC G06F 13/26 (2013.01) [G06F 3/023 (2013.01)] | 20 Claims |
1. A first electronic device for communication with a second electronic device on a single wire interface, the first electronic device comprising:
a memory; and
a processor executing an application stored in the memory, the processor being configured to:
receive, from the second electronic device, interrupt signals over the single wire interface, each of the interrupt signals including an interrupt count and a time difference, an interrupt signal corresponding to an input data provided by a user;
decode the input data corresponding to the interrupt signal, based on an interrupt protocol table; and
provide the decoded input data to the application on the first electronic device.
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12. A second electronic device for communication with a first electronic device on a single wire interface, the second electronic device comprising a processor configured to:
transform, using an interrupt protocol table, an input data into interrupt signals, each of the interrupt signals comprising an interrupt count and a time difference, and transmit the interrupt signals to the first electronic device on the single wire interface interface,
wherein: the interrupt signals are differentiated based on at least one of the interrupt count or the time difference, and
the at least one of the interrupt count or the time difference is determined based on the interrupt protocol table.
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16. A non-transitory computer-readable storage medium that includes a program that, when executed by a processor of a first electronic device, performs the method comprising: receiving, from a second electronic device, interrupt signals over a single wire interface, each of the interrupt signal including an interrupt count and a time difference and corresponding to an input data provided by a user; decoding the input data corresponding to an interrupt signal based on an interrupt protocol table; and providing the decoded input data to an application running on the first electronic device.
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