US 12,032,440 B2
Methods, apparatus, and articles of manufacture to determine memory access integrity based on feedback from memory
Saya Goud Langadi, Bangalore (IN); and David Peter Foley, Sugar Land, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Jul. 18, 2022, as Appl. No. 17/866,659.
Application 17/866,659 is a continuation of application No. 17/187,492, filed on Feb. 26, 2021, granted, now 11,392,455.
Prior Publication US 2022/0350699 A1, Nov. 3, 2022
Int. Cl. G11C 29/00 (2006.01); G06F 11/07 (2006.01); G06F 11/10 (2006.01); G06F 11/30 (2006.01); G06F 13/16 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/0772 (2013.01); G06F 11/3037 (2013.01); G06F 13/1631 (2013.01); G06F 13/1668 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method comprising:
receiving an operation directed to a memory, wherein the operation is associated with a first memory address;
causing the memory to perform the operation;
based on the memory performing the operation, receiving from the memory a second memory address associated with the performing of the operation;
comparing the first memory address associated with the operation as received to the second memory address associated with the operation as performed by the memory; and
determining whether an error occurred with respect to the operation based on the comparing of the first memory address to the second memory address.