US 11,700,722 B2
Method for manufacturing a semiconductor device using a support layer to form a gate structure
Jaewha Park, Yongin-si (KR); Moonkeun Kim, Hwaseong-si (KR); Sukhoon Kim, Hwaseong-si (KR); and Dongchan Lim, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 8, 2021, as Appl. No. 17/520,868.
Claims priority of application No. 10-2021-0052343 (KR), filed on Apr. 22, 2021.
Prior Publication US 2022/0344347 A1, Oct. 27, 2022
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/053 (2023.02) [H10B 12/315 (2023.02); H10B 12/34 (2023.02); H10B 12/482 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising:
patterning a substrate, thereby forming an active pattern;
forming a trench penetrating the active pattern;
forming a support layer covering the trench;
forming a first opening at the support layer;
forming a gate electrode layer filling the trench through the first opening; and
forming a bit line structure electrically connected to the active pattern,
wherein the support layer comprises a base portion covering a top surface of the active pattern, and a support portion disposed in the trench.