US 11,700,174 B2
Method for managing the operation of a system on chip, and corresponding system on chip
Nicolas Anquet, Grenoble (FR); and Loic Pallardy, Pouillon (FR)
Assigned to STMICROELECTRONICS (GRAND OUEST) SAS, Le Mans (FR); and STMICROELECTRONICS (ALPS) SAS, Grenoble (FR)
Filed by STMicroelectronics (Alps) SAS, Grenoble (FR); and STMicroelectronics (Grand Ouest) SAS, Le Mans (FR)
Filed on Nov. 18, 2020, as Appl. No. 16/951,198.
Claims priority of application No. 1913124 (FR), filed on Nov. 22, 2019.
Prior Publication US 2021/0160134 A1, May 27, 2021
Int. Cl. H04L 41/0803 (2022.01); H04L 41/0813 (2022.01); H04L 49/109 (2022.01); G06F 15/173 (2006.01); G06F 15/177 (2006.01); G06F 21/85 (2013.01)
CPC H04L 41/0813 (2013.01) [G06F 15/177 (2013.01); G06F 15/17306 (2013.01); H04L 41/0803 (2013.01); H04L 49/109 (2013.01); G06F 21/85 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A system on a chip, comprising:
a plurality of master pieces of equipment;
a plurality of slave resources;
an interconnection circuit coupled between the master pieces of equipment and the slave resources and capable of routing transactions between master pieces of equipment and slave resources; and
a processing unit configured to:
allow a user of the system on a chip to implement within the system on a chip at least one configuration diagram of the system defined by a set of configuration pieces of information including at least one piece of identification information assigned to each master piece of equipment, wherein the identification pieces of information are intended to be attached to all the transactions emitted by the corresponding master pieces of equipment, and wherein the set of the configuration pieces of information are not used for addressing the slave resources receiving the transactions and are used to define an assignment of at least one piece of master equipment to at least some of the slave resources; and
allow the user of the system on a chip to implement within the system on a chip an initial configuration diagram forming the configuration diagram;
wherein the processing unit comprises an installation unit including, from the master pieces of equipment, a first master manager piece of equipment, wherein the first master manager piece of equipment is configured to, in response to a first boot of the system on a chip, perform a boot phase at an end of which the first master manager piece of equipment is configured to at least allow implementation of the initial configuration diagram; and
wherein the installation unit is configured to temporarily make all the other master pieces of equipment inoperative as long as the first master manager piece of equipment has not completed its boot phase.