US 11,699,749 B2
Heterostructure of an electronic circuit having a semiconductor device
Stefan Schmult, Dresden (DE); Andre Wachowiak, Dresden (DE); and Alexander Ruf, Dresden (DE)
Assigned to NAMLAB GGMBH, Dresden (DE); and TECHNISCHE UNIVERSITÄT DRESDEN, Dresden (DE)
Filed by NaMLab gGmbH, Dresden (DE); and Technische Universität Dresden, Dresden (DE)
Filed on Jul. 11, 2019, as Appl. No. 16/509,022.
Claims priority of application No. 102018005642.3 (DE), filed on Jul. 12, 2018; and application No. 102018006173.7 (DE), filed on Aug. 2, 2018.
Prior Publication US 2020/0020790 A1, Jan. 16, 2020
Int. Cl. H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/78 (2006.01); H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/22 (2006.01); H01L 29/225 (2006.01); H01L 29/205 (2006.01)
CPC H01L 29/7787 (2013.01) [H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/22 (2013.01); H01L 29/225 (2013.01); H01L 29/7788 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An electronic circuit having a semiconductor device that comprises:
a heterostructure including a first layer and a second layer that together form a channel,
wherein the heterostructure is a III-V heterostructure,
wherein the first layer includes fewer than 1×1017 cm−3 oxygen atoms,
wherein the first layer comprises a compound semiconductor to which the second layer adjoins, and
wherein the channel, in the absence of an external field, is substantially free of electrons from a 2-dimensional electron gas.