US 11,699,727 B2
Semiconductor device
Makoto Shimosawa, Matsumoto (JP); and Takeyoshi Nishimura, Matsumoto (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kanagawa (JP)
Filed by FUJI ELECTRIC CO., LTD., Kanagawa (JP)
Filed on May 25, 2021, as Appl. No. 17/329,212.
Claims priority of application No. 2020-119805 (JP), filed on Jul. 13, 2020.
Prior Publication US 2022/0013645 A1, Jan. 13, 2022
Int. Cl. H01L 29/41 (2006.01); H01L 27/07 (2006.01); H01L 23/48 (2006.01); H01L 29/417 (2006.01); H01L 27/06 (2006.01); H01L 29/10 (2006.01); H01L 29/739 (2006.01); H01L 29/45 (2006.01); H01L 29/861 (2006.01); H01L 29/40 (2006.01)
CPC H01L 29/41708 (2013.01) [H01L 27/0664 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/45 (2013.01); H01L 29/7397 (2013.01); H01L 29/8613 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a drift region of first conductivity type provided in a semiconductor substrate;
a base region of second conductivity type provided in the semiconductor substrate;
an emitter region of first conductivity type provided at a front surface of the semiconductor substrate;
a contact region of second conductivity type provided on the base region and having a higher doping concentration than the base region;
a contact trench portion provided at the front surface of the semiconductor substrate;
a first barrier layer provided at a side wall and a bottom surface of the contact trench portion; and
a second barrier layer provided in contact with the contact region at the side wall of the contact trench portion, wherein
the second barrier layer is a silicon oxide film, and
a contact resistance between the second barrier layer and the emitter region is 100Ω or less.