US 11,699,495 B2
String dependent SLC reliability compensation in non-volatile memory structures
Xiang Yang, Santa Clara, CA (US)
Assigned to SanDisk Technologies LLC, Addison, TX (US)
Filed by SanDisk Technologies LLC, Addison, TX (US)
Filed on Jun. 16, 2021, as Appl. No. 17/349,118.
Prior Publication US 2022/0406389 A1, Dec. 22, 2022
Int. Cl. G11C 16/00 (2006.01); G11C 16/34 (2006.01); G11C 16/26 (2006.01); G11C 16/14 (2006.01); G11C 16/10 (2006.01)
CPC G11C 16/3495 (2013.01) [G11C 16/102 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 16/3463 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for programming a memory block of a memory structure of a non-volatile memory system, comprising:
determining whether a number of programming/erase cycles previously applied to a first memory block of the memory structure exceeds a first pre-defined programming/erase cycle threshold count; and
in response to a determination that the first pre-defined programming/erase cycle threshold count is exceeded:
designating one or more outermost memory strings of the first memory block as invalid, wherein the one or more outermost memory strings of the first memory block designated as invalid cannot be further programmed in any subsequent programming/erase cycles;
defining, within the first memory block, a memory sub-block that is comprised of all valid memory strings of the first memory block and does not include the one or more outermost memory strings of the first memory block designated as invalid; and
identifying a free memory block of the memory sub-block to be programmed.