US 11,699,474 B2
SOT-MRAM with shared selector
MingYuan Song, Hsinchu (TW); Shy-Jay Lin, Jhudong Township (TW); Chien-Min Lee, Hsinchu (TW); and William Joseph Gallagher, Ardsley, NY (US)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Mar. 16, 2022, as Appl. No. 17/696,394.
Application 17/696,394 is a continuation of application No. 17/002,351, filed on Aug. 25, 2020, granted, now 11,289,143.
Claims priority of provisional application 62/927,875, filed on Oct. 30, 2019.
Prior Publication US 2022/0208244 A1, Jun. 30, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/16 (2006.01); G01R 33/09 (2006.01); H01L 27/22 (2006.01); H01L 43/04 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); H01L 43/14 (2006.01); H10B 61/00 (2023.01); H10N 50/10 (2023.01); H10N 50/85 (2023.01); H10N 52/01 (2023.01); H10N 52/80 (2023.01)
CPC G11C 11/1675 (2013.01) [G01R 33/093 (2013.01); G11C 11/161 (2013.01); H10B 61/22 (2023.02); H10N 50/10 (2023.02); H10N 50/85 (2023.02); H10N 52/01 (2023.02); H10N 52/80 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A magnetic memory device comprising:
a first magnetic tunnel junction (MTJ) stack;
a first spin-orbit torque (SOT) induction wiring disposed on the first MTJ stack;
a first wiring coupled to a first end of the first SOT induction wiring; and a first portion of a selector layer coupled to a second end of the first SOT induction wiring and a second portion of the selector layer coupled to a second end of a second SOT induction wiring, the selector layer extending continuously between the first portion and the second portion.