US 11,699,468 B2
Memory device, semiconductor system, and data processing system
Yong Sang Park, Gyeonggi-do (KR); Joo Young Kim, Gyeonggi-do (KR); Min Soo Lim, Gyeonggi-do (KR); and Min Su Park, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Nov. 16, 2021, as Appl. No. 17/527,719.
Claims priority of application No. 10-2021-0071108 (KR), filed on Jun. 1, 2021.
Prior Publication US 2022/0383916 A1, Dec. 1, 2022
Int. Cl. G11C 7/10 (2006.01); G11C 8/06 (2006.01)
CPC G11C 7/1069 (2013.01) [G11C 7/109 (2013.01); G11C 7/1063 (2013.01); G11C 7/1096 (2013.01); G11C 8/06 (2013.01)] 32 Claims
OG exemplary drawing
 
13. A semiconductor system comprising:
a plurality of memory devices; and
a memory controller coupled to the plurality of memory devices respectively through a plurality of device line groups and coupled to a host device through system lines,
wherein the memory controller includes a write data processing component configured to:
receive, from the host device, base device information indicating a base device among the plurality of memory devices,
map, based on the base device information, the plurality of device line groups and a plurality of system line groups, which are divided from the system lines, and
transfer data, which are provided from the host device through the plurality of system line groups, to the plurality of device line groups mapped to the plurality of system line groups, respectively.