US 11,699,391 B2
Semiconductor device, display apparatus, and electronic device
Hajime Kimura, Atsugi (JP); and Takayuki Ikeda, Atsugi (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Apr. 19, 2022, as Appl. No. 17/723,613.
Claims priority of application No. 2021-081532 (JP), filed on May 13, 2021.
Prior Publication US 2022/0366845 A1, Nov. 17, 2022
Int. Cl. G09G 3/3225 (2016.01)
CPC G09G 3/3225 (2013.01) [G09G 2300/0876 (2013.01); G09G 2310/08 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first transistor;
a second transistor;
a third transistor;
a fourth transistor;
a fifth transistor;
a sixth transistor;
a seventh transistor;
an eighth transistor;
a ninth transistor;
a tenth transistor;
a first capacitor;
a second capacitor;
a third capacitor; and
a fourth capacitor,
wherein a first gate of the first transistor is electrically connected to a first gate of the fourth transistor,
wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of the fifth transistor, one of a source and a drain of the eighth transistor, and a first terminal of the fourth capacitor,
wherein the other of the source and the drain of the fifth transistor is electrically connected to a first gate of the sixth transistor and a first terminal of the second capacitor,
wherein the other of the source and the drain of the eighth transistor is electrically connected to a first gate of the ninth transistor and a first terminal of the third capacitor,
wherein a first gate of the second transistor is electrically connected to a first terminal of the first capacitor, one of a source and a drain of the third transistor, one of a source and a drain of the fourth transistor, a first gate of the seventh transistor, and a first gate of the tenth transistor,
wherein one of a source and a drain of the seventh transistor is electrically connected to one of a source and a drain of the sixth transistor and a second terminal of the second capacitor, and
wherein one of a source and a drain of the tenth transistor is electrically connected to one of a source and a drain of the ninth transistor and a second terminal of the third capacitor.