| CPC G06F 12/0238 (2013.01) [G06F 9/30101 (2013.01); G06F 9/30189 (2013.01); G06F 9/544 (2013.01); G06F 11/1451 (2013.01); G06F 11/1469 (2013.01); G06F 12/0891 (2013.01); G06F 13/1673 (2013.01); G11C 7/1039 (2013.01); G06F 2212/1021 (2013.01)] | 16 Claims |
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1. A method of controlling a memory, the method comprising:
receiving a write request including a write command, write data, and a write address;
writing, in response to the write command, the write data to a first write buffer having a first data width that matches a width of the write data;
writing first data stored in the first write buffer to a second write buffer based on the write address and an address of second data stored in the second write buffer, the second write buffer having a second data width that matches a data width of the memory and is, greater than the first data width;
writing the second data to the memory based on the write address and the address of the and data stored in the second write buffer,
receiving a read request including a read command and a read address;
reading third data from the memory and writing the third data to a read buffer having the second data width in response to the read command; and
outputting read data having the first data width and stored in the read buffer,
wherein the writing of the first data to the second write buffer comprises:
updating the third data by writing the first data to the read buffer when a region of the memory corresponding to the write address is included in a region of the memory corresponding to an address of the third data; and
writing, to the second write buffer, the updated third data from the read buffer as the second data.
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