US 11,698,833 B1
Programmable signal aggregator
Amulya Pandey, Kanpur (IN); Manish Bansal, Ghaziabad (IN); and Sandeep Bhattacharya, Noida (IN)
Assigned to STMICROELECTRONICS INTERNATIONAL N.V., Geneva (CH)
Filed by STMicroelectronics International N.V., Geneva (CH)
Filed on Jan. 3, 2022, as Appl. No. 17/567,540.
Int. Cl. G06F 11/10 (2006.01); G06F 11/07 (2006.01); G06F 9/48 (2006.01); G06F 9/30 (2018.01); G06F 11/27 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 9/30101 (2013.01); G06F 9/30145 (2013.01); G06F 9/4812 (2013.01); G06F 11/0772 (2013.01); G06F 11/27 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An electronic circuit comprising:
a plurality of signal channels;
a signal collection circuit configured to determine an action of the electronic circuit based on channel signals from the plurality of signal channels; and
a first signal management circuit coupled between the plurality of signal channels and the signal collection circuit, the first signal management circuit comprising:
a set of internal registers,
a set of user registers, and
a decoder configured to program the set of internal registers based on a content of the set of user registers, wherein the first signal management circuit is configured to receive the channel signals via the plurality of signal channels, generate first aggregated signals based on the received channel signals and a content of the set of internal registers, and transmit the first aggregated signals to the signal collection circuit.