US 11,698,748 B2
Memory comprising memory controller configured to determine a logical address of a target zone system and method of operating the memory controller
Yu Jung Lee, Gyeonggi-do (KR); Bo Kyeong Kim, Gyeonggi-do (KR); Do Hyeong Lee, Gyeonggi-do (KR); and Min Kyu Choi, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on May 4, 2021, as Appl. No. 17/307,325.
Claims priority of application No. 10-2020-0143764 (KR), filed on Oct. 30, 2020.
Prior Publication US 2022/0137858 A1, May 5, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0631 (2013.01); G06F 3/0679 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory system comprising:
a plurality of memory devices including a plurality of blocks configured of memory cells; and
a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices,
wherein the memory controller is further configured to:
open a target zone among the plurality of zones in response to a request from outside,
determine an offset of the target zone based on one or more selected from the group consisting of order in which the target zone is opened among the plurality of zones, ready-busy signals received from the plurality of memory devices, and erase counts of the plurality of blocks; and
determine a logical address of the target zone on which a write operation is to be started based on the offset and a write pointer corresponding to the target zone.