US 11,698,672 B2
Selective deactivation of processing units for artificial neural networks
Juergen Schirmer, Heidelberg (DE); Andre Guntoro, Weil der Stadt (DE); Armin Runge, Renningen (DE); Christoph Schorn, Leonberg (DE); Jaroslaw Topp, Renningen (DE); and Sebastian Vogel, Schaidt (DE)
Assigned to ROBERT BOSCH GMBH, Stuttgart (DE)
Appl. No. 17/52,166
Filed by Robert Bosch GmbH, Stuttgart (DE)
PCT Filed Jun. 3, 2019, PCT No. PCT/EP2019/064307
§ 371(c)(1), (2) Date Oct. 30, 2020,
PCT Pub. No. WO2019/243029, PCT Pub. Date Dec. 26, 2019.
Claims priority of application No. 102018209897.2 (DE), filed on Jun. 19, 2018; and application No. 102019205079.4 (DE), filed on Apr. 9, 2019.
Prior Publication US 2021/0232208 A1, Jul. 29, 2021
Int. Cl. G06F 1/3287 (2019.01); G06F 1/3237 (2019.01); G06N 3/04 (2023.01); G06N 3/063 (2023.01); G06V 20/56 (2022.01)
CPC G06F 1/3287 (2013.01) [G06F 1/3237 (2013.01); G06N 3/04 (2013.01); G06N 3/063 (2013.01); G06V 20/56 (2022.01)] 11 Claims
OG exemplary drawing
 
1. A hardware architecture for an artificial neural network (ANN), the ANN including a consecutive series of layers, each of the layers mapping its input variables onto output variables, and each of the output variables of the layers being input variables of a particular layer that follows in the series, the hardware architecture comprising:
a plurality of processing units, an implementation of each of the layers being split among at least two of the processing units; and
at least one resettable switch-off device that is configured to selectively deactivate at least one of the processing units, independently of the input variables supplied to the at least one of the processing units, so that at least one further one of the processing units remains activated in all layers of the consecutive series of layers whose implementation is contributed to by the at least one of the processing units, wherein:
the layers map the input variables onto the output variables using a plurality of neurons, in the split of the implementation, computation of the plurality of neurons being split among at least two of the processing units,
at least one of the at least two of the processing units has a share in the implementation of multiple layers of the consecutive layers, and
by selectively deactivating the at least one of the processing units, the resettable switch-off device deactivates a subset of the plurality of neurons associated with the at least one of the processing units.