US 12,356,826 B2
Display panel, manufacturing method thereof, and display device
Peng Xu, Beijing (CN); Wenhui Gao, Beijing (CN); Tiaomei Zhang, Beijing (CN); and Shilong Wang, Beijing (CN)
Assigned to Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/777,054
Filed by Chengdu BOE Optoelectronics Technology Co., Ltd., Sichuan (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Jun. 2, 2021, PCT No. PCT/CN2021/097959
§ 371(c)(1), (2) Date May 16, 2022,
PCT Pub. No. WO2022/252155, PCT Pub. Date Dec. 8, 2022.
Prior Publication US 2024/0164173 A1, May 16, 2024
Int. Cl. H10K 59/40 (2023.01); H10K 59/12 (2023.01); H10K 59/131 (2023.01); H10K 71/70 (2023.01)
CPC H10K 59/40 (2023.02) [H10K 59/1201 (2023.02); H10K 59/131 (2023.02); H10K 71/70 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A display panel, comprising a base substrate, an effective region provided on the base substrate and a bonding region located on a side of the effective region;
wherein the bonding region comprises a bonding pin region comprising bonding pins, virtual pins and test signal lines;
an orthographic projection of at least one of the test signal lines on the base substrate is within a range of an orthographic projection of at least one of the virtual pins on the base substrate, and the orthographic projection of the at least one of the virtual pins on the base substrate does not overlap with orthographic projections of the bonding pins on the base substrate;
the effective region comprises the base substrate and a display unit and a touch unit which are stacked on the base substrate, the display unit comprises a plurality of data lines and a plurality of gate lines, the plurality of data lines and the plurality of gate lines intersect with each other to define a plurality of sub-pixels, and the touch unit comprises a plurality of touch electrodes and touch leads connected to the plurality of touch electrodes; and
the display panel further comprises an array test region located on a side of the bonding region away from the effective region, the array test region comprises test pins, and the test signal lines are connected to the test pins and are configured to test one or more of the display unit and the touch unit.